EV on AIX?

[Marc Lehmann]

On Fri, Mar 23, 2012 at 04:02:59PM -0600, Darin McBride <darin.mcbride at shaw.ca> wrote:
> Actually, after further conversations with Peeter (the guy who wrote that 

Alas, it's not so easy.

> -       #define ECB_MEMORY_FENCE         __asm__ __volatile__ ("sync" : : : "memory")
> +       #define ECB_MEMORY_FENCE          __asm__ __volatile__ ("sync" : : : "memory")
> +       #define ECB_MEMORY_FENCE_ACQUIRE  __asm__ __volatile__ ("isync" : : : "memory")
> +       #define ECB_MEMORY_FENCE_RELEASE  __asm__ __volatile__ ("lwsync" : : : "memory")

The reason I used sync for everything was that it's available on all cpus,
while lwsync requires newer cpus, and it's probably not worth to reduce
portability further.

> +     #define ECB_MEMORY_FENCE           __sync   ()
> +     #define ECB_MEMORY_FENCE_ACQUIRE   __isync  ()
> +     #define ECB_MEMORY_FENCE_RELEASE   __lwsync ()

this might not be an issue with xlC, as xlC presumably knows what to
generate for its target cpu.

the problem is that documentation and the web all over disagree on what
the correct sermantics are:

http://cbloomrants.blogspot.com/2010/07/07-18-10-mystery-why-no-isync-for.html

(just one example).

it seems lwsync is not a storeload barrier, which it should be. and in turn,
isync is probably good enough for all existing cpus, but I'd rather not rely
too strongly on the future (thats the reason we use too strong memory fences
on x86 for example).

here's another article which goes into a lot of detail (also on why isync
and lwsync might not be good enough), if anybody is intersted:

http://www.rdrop.com/users/paulmck/scalability/paper/whymb.2010.06.07c.pdf

So, I guess I'll go with a full sync. You only pay once per loop
iteration or so.

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